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Marc Beninca 2021-10-10 19:04:03 +02:00 committed by Marc Beninca
parent 80e76995a5
commit c2e9034ce0
1 changed files with 0 additions and 4 deletions
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4
msys.py
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@ -7,10 +7,6 @@ SIGNATURE = '.sig'
SUBSYSTEM = 'msys'
ARCHITECTURES = [ARCHITECTURE, 'i686']
ARCHITECTURES_BITS = {
ARCHITECTURE: 64,
'i686': 32,
}
ARCHITECTURES_SUBSYSTEMS = {
ARCHITECTURE: [SUBSYSTEM, 'clang64', 'mingw64', 'ucrt64'],
'i686': [SUBSYSTEM, 'clang32', 'mingw32'],